Computer systems have become increasingly pervasive in our society. The processing capabilities of computers have increased the efficiency and productivity of workers in a wide spectrum of professions. As the costs of purchasing and owning a computer continues to drop, more and more consumers have been able to take advantage of newer and faster machines. Furthermore, many people enjoy the use of notebook computers because of the freedom. Mobile computers allow users to easily transport their data and work with them as they leave the office or travel. This scenario is quite familiar with marketing staff, corporate executives, and even students.
A processor technology advances, newer software code is also being generated to run on machines with these processors. Users generally expect and demand higher performance from their computers regardless of the type of software being used. One such issue can arise from the kinds of instructions and operations that are actually being performed within the processor. Certain types of operations require more time to complete based on the complexity of the operations and/or type of circuitry needed. This provides an opportunity to optimize the way certain complex operations are executed inside the processor.
One visible characteristic of the increasing performance of newer processors is the higher clock frequencies. With higher clock rates, the internal logic and circuitry of these processors operate faster to process and execute incoming software instructions. Improvements to the logic are needed in order to handle the different clock speeds as the frequency changes are not transparent to the circuitry. Another measure taken by circuit designers to improve performance is to introduce alternative logic units. For example, a staggered ALU may be employed to facilitate the execution of optimized low latency instructions. Ideally, all instructions would be processed as fast as possible. However, a traditional staggered ALU is not capable of handling every instruction, especially the more complex instructions, as certain functions have been excluded from the ALU in order to increase pipeline throughput. As a result, slower execution units that require many more clock cycles to process an instruction, but support special instructions, have still been necessary in some processor architectures.